Recently, TSMC—the world’s largest semiconductor foundry—has reported a shortage of capacity for its 3-nanometer (3nm) process node, drawing significant industry attention. Demand from major clients such as Apple, NVIDIA, and AMD for advanced chips remains extremely high, pushing TSMC’s 3nm production lines close to full utilization. Some customers are now experiencing delays in securing production slots. To alleviate the pressure, TSMC is encouraging certain clients to shift orders to slightly older—but still competitive—5nm or 4nm nodes, or to defer production until the next-generation 2nm process ramps up. While this strategy helps balance overall capacity allocation, it may delay product launches for some companies. Analysts note that the 3nm bottleneck reflects strong demand for cutting-edge chips in AI, high-performance computing, and smartphones, while also highlighting constraints in semiconductor manufacturing. TSMC is accelerating development and construction for its 2nm technology, with mass production expected by 2025 to meet future demand. In the short term, customers must carefully weigh trade-offs among performance, cost, and delivery timelines, while TSMC must strategically manage both capacity expansion and technological advancement to maintain its leadership in advanced semiconductor manufacturing.
近期，全球最大的晶圆代工厂台积电（TSMC）传出3纳米（3nm）制程产能告急的消息，引发业界广泛关注。由于苹果、英伟达、AMD等大客户对先进制程芯片需求持续高涨，台积电3nm产线已接近满载，部分客户甚至面临排产延迟。为缓解产能压力，台积电正推动部分客户将订单分流至稍旧但性能仍具竞争力的5nm或4nm制程，或延后至下一代2nm量产阶段。这一举措虽有助于平衡整体产能分配，但也可能影响部分产品上市节奏。分析指出，3nm产能紧张反映出先进制程在AI、高性能计算和智能手机等领域的强劲需求，同时也凸显了半导体制造环节的瓶颈。台积电已在加速推进2nm技术的研发与建厂进度，预计2025年实现量产，以应对未来市场需求。短期内，客户需在性能、成本与交付时间之间做出权衡，而台积电则需在扩产与技术迭代之间精准布局，以维持其在全球先进制程领域的领先地位。
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